Performance Comparison of Multi-Mode Modulation Techniques for SDR Using FPGA
| dc.contributor.advisor | Yihenew Wondie (PhD) | |
| dc.contributor.author | Sisay Bogale | |
| dc.date.accessioned | 2024-05-27T08:35:44Z | |
| dc.date.available | 2024-05-27T08:35:44Z | |
| dc.date.issued | 2023-11 | |
| dc.description.abstract | Radio devices that were previously built in hardware have been replaced in recent years by reconfigurable software defined radio (SDR) systems. Conventional hardware-based radios have restricted multi-functionality and are physically changeable only. This leads to an increase in production expenses and a reduction in the number of waveform standards that can be supported. A rapid and affordable answer to this issue is provided by software-defined radio technology, which enables software upgrades for multi-mode, multi-band, and multi-functional wireless devices. In SDR, different modulation techniques are used to achieve efficient communication over a radio channel. Multi-mode modulation is an approach that allows the use of multiple modulation schemes in a single system, which can enhance the flexibility and resilience of communication systems. This paper presented a design and implementation of multi-mode modulation techniques for SDR using FPGA and analyze the performance based on the FPGA resource utilization. It combines six modulation schemes: QASK, QPSK, QAM, AM, PM and FM to create multi-mode modulation system. The performance of this multi-mode modulation system is evaluated in terms of FPGA resource utilization such as total computational power, total number of Look Table (LUT) or memory used, Flip Flops (FF) and Input/Output (IO) port usage. Xilinx Vivado system generator for DSP with MATLAB/Simulink is used to design, simulate and verify the multi-mode modulator, which would then be implemented on a Xilinx Zedboard FPGA hardware. A total of 0.225W power, 844 number of LUT and 1 IO port is utilized by the implemented design. The biggest thing we achieved in this research is that we saved computational power. 1.572W and 1.134W amount of power is saved by our design as compared to previous two studies. | |
| dc.identifier.uri | https://etd.aau.edu.et/handle/123456789/3036 | |
| dc.language.iso | en_US | |
| dc.publisher | Addis Ababa University | |
| dc.subject | FPGA | |
| dc.subject | AM | |
| dc.subject | FM | |
| dc.subject | PM | |
| dc.subject | 4ASK | |
| dc.subject | QPSK | |
| dc.subject | 4QAM | |
| dc.subject | SDR | |
| dc.subject | Multi-mode modulation | |
| dc.title | Performance Comparison of Multi-Mode Modulation Techniques for SDR Using FPGA | |
| dc.type | Thesis |