Design and Modeling of Superconducting Fault Current Limiter for a High Voltage Substation A Case study: AkAki substation II (400KV to 230KV)

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Date

2017-10

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Addis Ababa University

Abstract

Modern electric power systems are becoming more complex in order to meet high load demand with good quality. So, the increasing amount of on-site generation should be integrated into the power grid. This translates to more sophisticated electric network with intrinsically high short circuit current capacity. A superconducting fault current limiter (SFCL) is proposed as a solution in order to increase safety margin of circuit breakers (CBs) by reducing the maximum short-circuit current below the breaking capacity of the substation. SFCL is a device with negligible impedance under normal operating conditions that immediately switches to a high impedance state in case of over-current. This advantage makes SFCL a key component in this regard. At AkAki II substation, 230 kV bus-bar, a hybrid-resistive SFCL is designed. The design procedure encompasses collection of the substation data, short-circuit analysis of the substation and designing of all parts of the SFCL. The short-circuit analysis is done using ETAP simulation software. Then, a hybrid-resistive SFCL is designed to have a current-limitingresistor with 143.2 MW rating at 4.111 kA and 8.476 Ω, 5.832 cm width and 721.76 m length of selected (Yttrium, bismuth, strontium, copper and oxygen)YBCO coated-conductor, fastswitch interrupting 9.35 kA within 48 ms, and a cooling requiring 80 liters of liquid nitrogen and 256 kW condenser. This designed SFCL is modeled using Matlab/Simulink and the result showed that the SFCL can minimize the maximum short-circuit current from 44 kA to 35 kA and enables the substation to clear the fault without problem. This means that the substation can be integrated to additional power coming from a generation having short-circuit rating of 3585 MVA with the previous safety margin still. To implement the SFCL system, the whole system components cost $320,000/phase and require 10m × 20m area by 1.8m height space of the substation.

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Keywords

SFCL design, SFCL model using Matlab, short-circuit analysis using ETAP, AkAki II substation, fault current limiter

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